The invention relates to the field of semiconductor processing and particularly to the deposition of two or more layers on a substrate in situ.
Thermal SiO2 and SiON cannot meet gate dielectric leakage current requirements at the 65 nm or 45 nm technology node and beyond. As a result, replacement dielectric materials are necessary. An important group of candidate materials are Hf based oxides such as HfO2, HfAlxOy, HfSiO and HfSiON. Hafnium oxide (HfO2) can be deposited very well by atomic layer deposition (ALD) from HfCl4 and H2O at about 300xc2x0 C. and is found to have good high-temperature stability and low leakage currents. However, HfO2 exhibits a high diffusion coefficient for oxygen and when a polysilicon layer is deposited by CVD at 620xc2x0 C. directly on top of the HfO2 layer, electrically shorted devices are often obtained.
The addition of silicon and nitrogen to a HfO2 based gate stack can enhance the properties of the gate stack. One possible way to add silicon and nitrogen to a HfO2 based gate stack is to combine HfO2 deposition with Si3N4 deposition. This can be achieved simply by combining the HfO2 deposition process with a silicon nitride deposition process. For example, formation of a high-k gate dielectric stack can comprise a single deposition of HfO2 followed by a single deposition of a thin silicon nitride layer. Preferably the HfO2 deposition is preceded by the formation of a silicon oxide or silicon oxynitride interface layer about 0.3 to about 1.5 nm thick. This interface layer can be a chemical oxide, a thermally grown oxide or oxynitride or a film grown using excited species from a plasma. Alternatively, an interface oxide can be formed by oxidation after deposition of the high-k film.
The high-k gate dielectric stack can comprise a more advanced sequence of alternating depositions. Examples include Si3N4-HfO2-Si3N4, HfO2-Si3N4-HfO2-Si3N4-HfO2-Si3N4-HfO2-Si3N4.
Although the ALD technique is perfectly suited for the deposition of HfO2 films, the deposition of silicon nitride by ALD has been problematic due to the lack of suitable source materials. It is difficult to avoid the incorporation of large amounts of carbon in the deposition of nitride films by ALD. Therefore, a remote plasma enhanced CVD (RPECVD) process has been used to deposit the silicon nitride film in high-k dielectric stacks. In a typical process, SiH4 is used as the silicon source gas and N* radicals are generated in a remote plasma chamber. The deposition is carried out at a substrate temperature of about 650xc2x0 C. See, for example, U.S. Pat. No. 6,534,900, issued Apr. 8, 2003, incorporated herein by reference in its entirety.
To deposit a high-k dielectric stack, the HfO2 film is deposited in an ALD reaction chamber, operated at a temperature optimized for the ALD process, for example about 300xc2x0 C., and the silicon nitride process is deposited in a separate RPECVD chamber operated at a temperature of about 650xc2x0 C. When a stack of alternating HfO2 and silicon nitride films is deposited, it is necessary to transport the substrate back and forth between the two reaction chambers, which is time consuming and increases the risk of wafer contamination or other detrimental effects.
In accordance with one aspect of the invention, a method is provided for forming a gate dielectric stack on a semiconductor substrate in situ. The method includes loading the substrate into a reaction chamber. A high-k dielectric layer comprising metal oxide is deposited onto the substrate within the chamber by atomic layer deposition (ALD). A silicon nitride layer is deposited onto the substrate in the same chamber under substantially isothermal conditions with the ALD process. Preferably the silicon nitride layer is deposited by a chemical vapor deposition (CVD) process, more preferably by remote plasma enhanced chemical vapor deposition (RPECVD).
In some embodiments the silicon nitride layer is deposited over the high-k metal oxide. In other embodiments, the silicon nitride layer is deposited prior to deposition of the high-k metal oxide.
The substantially isothermal conditions preferably comprise temperatures that differ by less than about 50xc2x0 C. In one embodiment, the ALD process and the RPECVD process are carried out at temperatures from about 250xc2x0 C. and about 400xc2x0 C. In a particular embodiment both processes are carried out at a temperature from about 295xc2x0 C. to about 305xc2x0 C.
The metal oxide is preferably selected from the group consisting of oxides of oxides of Li, Be, Mg, Ca, Sr, Sc, Y, Zr, Hf, Al, La, Ce, Pr, Nd, Sm, Eu, Gd, Th, Dy, Ho, Er, Tm, Yb, Lu and mixtures thereof, including mixtures comprising Si. Particularly preferred oxides include HfO2, HfSiOz, ZrO2 and ZrSiOz, wherein z is preferably 4. The silicon nitride preferably comprises Si3N4.
In accordance with another aspect of the invention, a process is provided for forming a gate dielectric stack in an integrated transistor on a semiconductor substrate. One or more high-k dielectric dielectric layers are deposited on the semiconductor substrate in a processing chamber by an ALD process. Alternatingly with the one or more high-k dielectric oxide layers, one or more silicon nitride layers are deposited by an RPECVD process at substantially isothermal conditions without removing the substrate from the processing chamber.
In another aspect, the invention provides a method of depositing two or more layers on a substrate in situ by depositing a first layer on a substrate in a reaction chamber by an ALD process and depositing a second layer on the substrate in the reaction chamber by an RPECVD process. Preferably the ALD and RPECVD processes are conducted under substantially isothermal conditions.